From 4c6200bf442f83e4610796a56de314176abf0fd7 Mon Sep 17 00:00:00 2001 From: Damian Gryski Date: Mon, 9 Apr 2018 09:44:51 -0700 Subject: [PATCH] reorder/reword processor cache notes --- performance.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/performance.md b/performance.md index 897c173..43524b4 100644 --- a/performance.md +++ b/performance.md @@ -922,10 +922,10 @@ Techniques specific to the architecture running the code * building intuition around cache-lines: sizes, padding, alignment * OS tools to view cache-misses * maps vs. slices - * SOA vs AOS layouts - * reducing pointer chasing + * SOA vs AOS layouts: row-major vs. column major; when you have an X, do you need another X or do you need a Y? * temporal and spacial locality: use what you have and what's nearby as much as possible - * memory prefetching; frequently ineffective; lack of intrinsics means function call overhead + * reducing pointer chasing + * explicit memory prefetching; frequently ineffective; lack of intrinsics means function call overhead (removed from runtime) * make the first 64-bytes of your struct count * branch prediction * remove branches from inner loops: